<-- makefile sample 1 -->
all: main.o tools.o utility.o<-- makefile sample 2 -->
gcc -o a.out main.o tools.o utility.o
main.o: main.c
gcc -o main.o -c main.c
tools.o: tools.c
gcc -o tools.o -c tools.c
utility.o: utility.c
gcc -o utility.o -c utility.c
clean:
rm -f *.o a.out
# erase old setting in suffixes<-- makefile sample 3-->
.SUFFIXES:
# add new setting into suffixes
.SUFFIXES: .c .cpp .o
EXE = a.out
CC = gcc
all: main.o tools.o utility.o
$(CC) -o $(EXE) $^
.c.o:
$(CC) -o $@ -c $<
clean:
rm -f *.o $(EXE)
.SUFFIXES:
.SUFFIXES: .c .cpp .o
EXE = round
CC = g++
OBJS = round.o
all: $(OBJS)
$(CC) -o $(EXE) $(OBJS)
./$(EXE)
.c.o:
$(CC) -c -o $@ $<
.cpp.o:
$(CC) -c -o $@ $<
clean:
rm -f *.o $(EXE)